1. Field of the Invention
The present invention relates to mask overlay technologies for semiconductor processing.
2. Description of the Related Art
When making a semiconductor device, overlay marks are required at different layers of the semiconductor device. The overlay of a mask of a current layer is accomplished by aligning a current layer overlay pattern provided on the mask to a front layer overlay mark that has been manufactured within a front layer. The information about the center of the front layer overlay mark is required in mask overlay.
However, the front layer overlay mark may have a non-ideal shape. For example, depending on the semiconductor processes of the front layer, the front layer overlay mark may have damaged edges (referring to FIG. 1A) or be covered by an uneven film (referring to FIG. 1B). The damaged edges or the uneven film may considerably affect the accuracy of the center information about the front layer overlay mark. As shown in FIG. 1A or FIG. 1B, the obtained center deviates from the real center of the front layer overlay mark by a distance Δx. The error (Δx) of the center information seriously affects the mask overlay.